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Sheet目录3841

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2010-2012 Microchip Technology Inc.

DS39977F-page 197

PIC18F66K80 FAMILY

12.1

DSM Operation

The DSM module can be enabled by setting the MDEN

bit in the MDCON register. Clearing the MDEN bit in the

MDCON register, disables the DSM module by auto-

matically switching the carrier high and carrier low

signals to the VSS signal source. The modulator signal

source is also switched to the MDBIT in the MDCON

inactive, but that it is also consuming the least amount

of current.

The values used to select the carrier high, carrier low

and modulator sources held by the Modulation Source,

Modulation High Carrier and Modulation Low Carrier

Control registers are not affected when the MDEN bit is

cleared, and the DSM module is disabled. The values

inside these registers remain unchanged while the

DSM is inactive. The sources for the carrier high,

carrier low and modulator signals will once again be

selected when the MDEN bit is set and the DSM

module is again enabled and active.

The modulated output signal can be disabled without

shutting down the DSM module. The DSM module will

remain active and continue to mix signals, but the out-

put value will not be sent to the MDOUT pin. During the

time that the output is disabled, the MDOUT pin will

remain low. The modulated output can be disabled by

clearing the MDOE bit in the MDCON register.

12.2

Modulator Signal Sources

The modulator signal can be supplied from the following

sources:

ECCP1 Signal

CCP2 Signal

CCP3 Signal

CCP4 Signal

CCP5 Signal

MSSP SDO Signal (SPI mode only)

EUSART1 TX1 Signal

EUSART2 TX2 Signal

External Signal on MDMIN Pin (RF0/MDMIN)

MDBIT bit in the MDCON Register

The modulator signal is selected by configuring the

MDSRC<3:0> bits in the MDSRC register.

12.3

Carrier Signal Sources

The carrier high signal and carrier low signal can be

supplied from the following sources:

CCP1 Signal

CCP2 Signal

CCP3 Signal

CCP4 Signal

Reference Clock Module Signal

External Signal on MDCIN1 Pin (RF2/MDCIN1)

External Signal on MDCIN2 Pin (RF4/MDCIN2)

VSS

The carrier high signal is selected by configuring the

MDCH<3:0> bits in the MDCARH register. The carrier

low signal is selected by configuring the MDCL<3:0>

bits in the MDCARL register.

12.4

Carrier Synchronization

During the time when the DSM switches between car-

rier high and carrier low signal sources, the carrier data

in the modulated output signal can become truncated.

To prevent this, the carrier signal can be synchronized

to the modulator signal. When synchronization is

enabled, the carrier pulse that is being mixed at the

time of the transition is allowed to transition low before

the DSM switches over to the next carrier source.

Synchronization is enabled separately for the carrier

high and carrier low signal sources. Synchronization for

the carrier high signal can be enabled by setting the

MDCHSYNC bit in the MDCARH register. Synchroniza-

tion for the carrier low signal can be enabled by setting

the MDCLSYNC bit in the MDCARL register.

Figure 12-1 through Figure 12-5 show timing diagrams

of using various synchronization methods.

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